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Performance and harmonic detection algorithm of phase locked Loop for parallel APF


As the boost of power electronics technology, the harmonic problem in the power system is becoming increasingly prominent. Fourier decomposition is performed on the load current in the power system, and components with a frequency that is an integer multiple of the fundamental wave are referred to as harmonic components. Harmonic control is essential to establish a safe and reliable power grid environment and provide high-quality and clean electricity to power users. The study focused on parallel active power filters, proposed a specific harmonic detection method on the grounds of synchronous harmonic rotating coordinate system, and developed a phase-locked loop design on the grounds of order generalized integrator. Meanwhile, a compensation current control method on the grounds of space vector pulse width modulation was introduced. The results showed that in the full compensation simulation experiment, the compensated A-phase grid side current waveform was significantly improved and presented a sinusoidal shape. After 0.05 s, the actual output compensation current closely followed the command current. Meanwhile, after compensation, the total harmonic distortion rate decreased from 26.58 to 3.06%. In specific harmonic compensation simulation experiments, when the sum of 5th, 7th, and 11th harmonic components was used as the command current for compensation, the distortion of the current waveform was improved after the load undergoes a sudden change. After compensation, the 5th, 7th, and 11th harmonic content significantly decreased, and the total harmonic distortion rate decreased to 4.08%. This indicated that the proposed phase-locked loop design and harmonic detection method for active power filters had high stability and effectiveness. The study’s primary contribution is to enhance the utilization efficiency of DC voltage and improve the dynamic response ability of current. Additionally, it offers a new method for reducing the impact of harmonics on the power grid and improving power quality. It provided an effective method reference for technological progress in related fields such as power electronics and control engineering.


As the boost of industrial technology, the large-scale utilization of new power electronic equipment has brought harmonic pollution and power quality problems to the power grid (PG) (Hoevenaars et al. 2020). Various high-power rectifiers, inverters, frequency converters, and other power electronic equipment are commonly used in industrial production. However, the increasing use of various nonlinear loads on the user side, such as frequency converters and arc furnaces, generates a large number of harmonic component (HC) during operation. Therefore, it is necessary to adopt effective methods for harmonic control. At present, harmonic control mainly adopts two methods: active and passive (Gali et al. 2021). The proactive governance strategy aims to eliminate the harmonics generated by the harmonic source itself, control the power factor to 1, and is suitable for the main harmonic source in the PG, such as power electronic devices. Although this method could decrease the generation of harmonics, it cannot be completely eliminated. Passive governance is achieved by installing compensation devices near the harmonic source to compensate for harmonics in the system and prevent harmonic currents from flowing into the PG. This method is currently the main harmonic control method, but there are still some defects and limitations [34]. To address such issues, a parallel active power filter (APF) was introduced, which detects the HC in the load side current and injects compensation current into the PG for filtering out the HCs in the current and compensate for reactive power (RP). Meanwhile, corresponding phase-locked loops (PLL), specific harmonic detection methods, and compensation current control methods were studied and designed. The parallel APF structure connects the APF to the PG in parallel through reactors. It detects HCs in the load side current and injects compensation current into the PG to filter out the HCs in the current and compensate for reactive power. This structure is suitable for environments with inductive harmonic sources. Additionally, reactive power compensation and imbalance suppression functions can be implemented as necessary using flexible compensation methods. The contribution of the research lies in the introduction of a PLL structure on the grounds of second-order generalized integrators. The traditional synchronous rotating frame phase locked loop (SRF-PLL) solves the problem of large frequency fluctuations in the output, which helps to ensure the accuracy of the output phase. Meanwhile, a specific harmonic current detection (HCD) method on the grounds of synchronous harmonic rotation coordinate system (SHRCS) has been introduced, which helps to achieve the separation and detection of multiple harmonics. The research content includes four parts. The first part provides an overview of APF, PLL, and harmonic detection methods. The second part introduces the performance of PLL and harmonic detection algorithm for parallel APF. The first section introduces a specific HCD method on the grounds of SHRCS, and the second section introduces SRF-PLL design. The third section introduces the compensation current control method on the grounds of space vector pulse width modulation (SVPWM). The third part conducts simulation experiments to verify the proposed method in the research. The fourth part summarizes the results and proposes future prospects.

HCD is a crucial step in the operation of APF, and its detection accuracy directly affects the compensation performance of APF. Pan G and other scholars proposed a system level harmonic suppression method that does not require phase synchronization to address the issue of multi bus phase synchronization in existing system level harmonic reduction methods. The results indicate that this method can achieve good harmonic compensation performance and ensure that the distortion rate of multi bus harmonic voltage in the PG meets the standard (Pan et al. 2021). Li Z et al. proposed an interesting view correction method to address the relationship between detection accuracy and effectiveness of single-phase parallel APF HCD. The results show that improving detection accuracy can enhance the effectiveness of detection when the load current undergoes periodic changes, while the opposite is true when the load current undergoes non periodic changes (Li et al. 2022). Researchers such as El Rahman A found that traditional ip iq harmonic detection methods have slow response and low accuracy. Therefore, they proposed a harmonic detection method on the grounds of the double second-order sliding window discrete Fourier transform. This method combines SOGI-PLL and half cycle sliding window iteration, reducing computational complexity and improving detection accuracy. The outcomes showcase that the method possesses a fast response speed and high detection accuracy, which verifies its effectiveness (El-Rahman et al. 2020). Researchers such as Prabakaran S proposed an adaptive HCD method on the grounds of neural networks to address the issue of improving the detection performance of APFs. This method utilized adaptive noise cancellation technology to separate harmonic currents from the load current. The results show that this method can still maintain high-precision HCD performance under sudden load changes (Prabakaran et al. 2020). To solve the problem of poor HCD performance, scholars such as Qiankun LI proposed an active filter method on the grounds of fixed step minimum mean square algorithm and embedded low pass filter (LPF). It used the sparrow search algorithm to improve the filtering parameters and verifies its applicability under different load values. The Matlab simulation results showcase that the SSA algorithm can decrease the current THD to below 5% (Qiankun and Yili 2022).

At present, SOGI method and synchronous rotating coordinate system (SRCS) transformation method are widely used in harmonic and vibration problems of power systems. To solve the DC offset problem in digital implementation of parallel SOGIs, scholars such as Zheng H proposed an improved pulse invariance method to discretize SOGIs. Meanwhile, LPFs were introduced to eliminate the DC offset of discrete SOGI. The results showed that the method exhibits zero AC error and good dynamic characteristics (Zheng et al. 2022). Guo M et al. proposed two frequency feeding methods independent of PLL to meet the demand of SOGI for grid voltage and frequency information in single-phase systems. Type A used cascaded recursive discrete Fourier transform and inverse recursive discrete Fourier transform for normalization, while type B used SOGI output for normalization. The results showed that both methods perform better than traditional PLL methods under transient and steady-state grid voltage disturbances (Guo et al. 2021). Cui P and other researchers discovered the synchronization and multi frequency harmonic vibration problems of maglev control torque gyroscopes in high-performance satellite platforms, and therefore proposed a control algorithm on the grounds of multi SRCS transformation. This algorithm utilized displacement sensors with orthogonal characteristics to output signals and simultaneously suppress vibrations in both directions through a controller. The results showed that this method can achieve high-precision and fast response harmonic vibration suppression (Cui et al. 2021). Song Z et al. proposed a harmonic current suppression method on the grounds of synchronous rotation coordinate transformation and adaptive filtering algorithm to address the issues of air gap magnetic field distortion and inverter nonlinearity in high-speed and precision applications of permanent magnet synchronous motors. The outcomes demonstrated the correctness and effectiveness (Song et al. 2021).

Amin et al. proposed a single-phase grounding fault location algorithm for distribution networks based on the differential equation method for measuring the fundamental frequency. The algorithm used the alternating transient program Draw to simulate the network model. The results showed that the method reduced the impact of HCs on fault location (Amin et al. 2023). To address the issue of potential distortion of fault signals due to distributed generators, Yuan J utilized a single-phase grounding fault feeder detection method for distribution networks that is based on correlation analysis and harmonic energy. The effectiveness of this method was confirmed through simulation results and actual data testing (Yuan et al. 2022). To mitigate the negative impact of electrical equipment failures, transformer overheating, and other issues on power quality, Mishra et al. utilized common coupling points to feed compensation currents into three-phase (TP) systems. This improved the balance and sinusoidal grid currents, resulting in reduced harmonic distortion (Mishra et al. 2022).

According to research by numerous scholars, significant progress has been made in algorithms such as predictive control and artificial neural network control for the performance of PLL and harmonic detection methods. However, due to their complexity, these algorithms are still relatively uncommon in practical applications. Currently, an important research direction is the composite control method that combines two control methods simultaneously, utilizing the strengths of both methods to improve the shortcomings of one method. The research employs a HCD algorithm based on instantaneous reactive power theory to detect and separate various HCs. An analysis was conducted on the influence of parameters such as DC side capacitance, DC side voltage, and connecting inductance on the compensation effect. The main circuit parameter design and selection were completed. The research’s primary contribution is to enhance the efficiency of DC voltage utilization and improve the current’s dynamic response capability. Additionally, it offers a new method for reducing the impact of harmonics on the PG and improving power quality.

In summary, numerous researchers conducted extensive research on HCD in APF and have achieved certain results. On this basis, this study introduced a multi SRCS transformation HCD method and proposes a PLL design method on the grounds of SOGI. This is for reducing the impact of harmonics on the PG and further improve the stability and reliability of the power system.

Harmonic detection and PLL design for parallel APF

This study first presents a specific HCD method on the grounds of the theory of instantaneous RP, using a synchronous harmonic rotating coordinate system. Subsequently, to provide accurate phase information to the transformation matrix, the SOGI-PLL method is introduced in the study. Finally, the SVPWM method is proposed to achieve APF control, and a harmonic detection method on the grounds of DC side voltage control is proposed.

Harmonic detection algorithm on the grounds of instantaneous RP theory

According to the working principle of APF, accurately obtaining the instruction current is a necessary condition for achieving harmonic compensation. Due to the characteristics of harmonic distribution, higher requirements are placed on the speed and dynamic performance of harmonic detection methods. In response to this issue, the instantaneous RP theory is introduced and corresponding harmonic detection methods are proposed. It assumes that the voltage values of each phase in a TP circuit are \({e_a}\), \({e_b}\), and \({e_c}\), and the instantaneous values of current are \({i_a}\), \({i_b}\), and \({i_c}\), respectively. After coordinate transformation, it is converted into instantaneous values of voltage and current vectors in the α-β coordinate system. On the grounds of the theory of instantaneous RP, two detection methods, p-q method and ip-iq method, are proposed, both of which belong to the fundamental wave extraction algorithm. The core of this algorithm is for extracting the fundamental component from the signal to be detected, and obtain the harmonic command signal by subtracting the fundamental component from the original signal. But its disadvantage is that detecting harmonic currents as a whole cannot achieve the separation of specific sub harmonics [1718]. As an active device, APF has limited bandwidth and insufficient compensation ability for high-order harmonics. According to the analysis of harmonic characteristics, the harmonics in the power system are mainly concentrated at 6 K ± 1 order, and the harmonic content is inversely proportional to the quantity of harmonics. The higher the quantity of harmonics, the smaller the content, and the lower the harm to the PG. Therefore, for high-order harmonics, they can be filtered out through passive devices or not compensated. For low order harmonics with high content and high harm, compensation can be achieved through parallel APF. When the capacity of the compensation device is limited, if all HCs are used as command currents, it may lead to inaccurate limiting compensation of the compensation current. In actual distribution networks, the harmonic composition and amplitude values of each harmonic are variable, so selective compensation is more flexible than full compensation (Mahmoudi et al. 2021). In response to the above characteristics, an improved SHRCS detection method on the grounds of the ip-iq method is proposed to achieve the detection of specified harmonics. The coordinate transformation for synchronous rotation expresses the mathematical relationship between electromagnetic quantities, such as voltage, current, and magnetic flux, and mechanical quantities, such as torque and speed, in a synchronous motor. This transformation is essential for conducting dynamic analyses of synchronous motors and power systems. The mathematical model commonly used for synchronous motors in power systems comprises two parts: the circuit equation of synchronous motors and the rotor motion equation. The principle of SHRCS detection method is showcased in Fig. 1.

Fig. 1
figure 1

Schematic diagram of the SHRCS detection method

In Fig. 1, \({U_{abc}}\) represents the grid voltage, which is detected by PLL to obtain real-time phase information of the grid. \({{\text{i}}_{{\text{La}}}}\), \({{\text{i}}_{{\text{Lb}}}}\) and \({{\text{i}}_{{\text{Lc}}}}\) represent the load current, which is transformed into a stationary vector by a specified multiple of the fundamental angular frequency. Using a LPF to filter out higher-order harmonics, the DC component of the specified harmonic is obtained. Then, the specified harmonic command current is obtained by inverse transformation, achieving the separation of the specified harmonic. Among them, \({{\text{C}}_{{\text{\varvec{\upalpha}\varvec{\upbeta}-pqn}}}}\) represents the transformation matrix, and \({{\text{C}}_{{\text{pqn-\varvec{\upalpha}\varvec{\upbeta}}}}}\) represents the inverse transformation matrix (Mohamad et al. 2023). It assumes that the TP current is symmetrical, and the representation of the load current is shown in Eq. (1).

$$\left\{ \begin{gathered} {{\text{i}}_{{\text{La}}}}=\sum\limits_{{n=1}}^{\infty } {\sqrt 2 {I_n}\sin (n\omega t+{\varphi _n})} \hfill \\ {{\text{i}}_{{\text{Lb}}}}=\sum\limits_{{n=1}}^{\infty } {\sqrt 2 {I_n}\sin (n\left( {\omega t - 120^\circ } \right)+{\varphi _n})} \hfill \\ {{\text{i}}_{{\text{Lc}}}}=\sum\limits_{{n=1}}^{\infty } {\sqrt 2 {I_n}\sin (n\left( {\omega t+120^\circ } \right)+{\varphi _n})} \hfill \\ \end{gathered} \right.$$

In Eq. (1), \(\omega t\) represents angular velocity and \(\varphi\) represents phase angle. \({\text{n}}\) represents the number of harmonics. When \({\text{n}}=3k+1\), the order of the TP harmonics A, B, and C lags in sequence, that is, positive sequence harmonics. When \({\text{n}}=3k - 1\), the TP harmonic sequence leads in sequence, that is, the negative sequence harmonic. When \({\text{n}}=3k\), the TP harmonics have the same phase, which is called zero sequence harmonics. Through a LPF, the DC component can be gotten, which is represented as Eq. (2).

$$\left[ \begin{gathered} {\text{i}}{{\text{*}}_{pn}} \hfill \\ {\text{i}}{{\text{*}}_{qn}} \hfill \\ \end{gathered} \right]=\sqrt 3 \left[ \begin{gathered} \pm {I_n}\cos {\varphi _n} \hfill \\ -{I_n}\sin {\varphi _n} \hfill \\ \end{gathered} \right]$$

\({\text{i}}{{\text{*}}_{pn}}\), \({\text{i}}{{\text{*}}_{qn}}\) represents the DC component after LPF. After inverse coordinate transformation, the specified HC can be obtained, and its calculation is shown in Eq. (3).

$$\left\{ \begin{gathered} {{\text{i}}_{{\text{ahn}}}}=\sqrt 2 {I_n}\sin ( \pm n\omega t+{\varphi _n}) \hfill \\ {{\text{i}}_{{\text{bhn}}}}=\sqrt 2 {I_n}\sin ( \pm n\omega t+{\varphi _n} \mp 120^\circ ) \hfill \\ {{\text{i}}_{{\text{chn}}}}=\sqrt 2 {I_n}\sin ( \pm n\omega t+{\varphi _n} \pm 120^\circ ) \hfill \\ \end{gathered} \right.$$

This method can achieve the separation of specified harmonics. If multiple harmonics need to be compensated, a multi harmonic detection structure can be constructed, as shown in Fig. 2. In Fig. 2, the yellow triangle represents the fundamental phase, and sin cos represents the reference phase. \({{\text{C}}_{{\text{abc-pqn}}}}\) represents the transformation matrix, and \({\text{C}}_{{{\text{abc-pq7}}}}^{{ - 1}}\) represents the inverse transformation matrix. \({{\text{K}}_n}\) represents the damping coefficient. \({{\text{i}}_h}\) is the final command current. After extracting the fundamental phase from the PLL, a specified harmonic reference phase is obtained to participate in coordinate operation. LPF and inverse coordinate transformation are used to achieve separation detection of multiple harmonics. This method allows for the combination of a certain harmonic current or several harmonic currents as needed to ultimately obtain the instruction current. At the same time, it can accurately limit the amplitude control of each harmonic, allowing for more flexible use of the APF’s capacity.

Fig. 2
figure 2

HCD structure of the multi-synchronous rotation coordinate system

PLL design on the grounds of SOGI

To achieve accurate HCD and compensation, it is essential for getting accurate frequency and phase information of the grid voltage. Therefore, a PLL link is needed to provide accurate phase information to the transformation matrix. The TP PLL structure can be regarded as a phase negative feedback system. The system mainly contains three parts: a phase detector, a loop filter, and a voltage controlled oscillator (Achlerkar and Panigrahi 2021). The phase detector is responsible for comparing the phase of the input voltage with the output phase signal, and generating a phase error signal. The loop filter will filter out the high-frequency interference in the phase error signal, while the voltage controlled oscillator will gradually approximate the phase of the output signal to the phase of the input voltage. When the output phase error signal of the phase detector is zero, it indicates that the PLL has successfully locked the phase, and the output signal is the phase signal of the input voltage. In practical applications, the voltage of the PG will exhibit imbalance due to voltage fluctuations, which will have an impact on the output results of the PLL. Under ideal conditions, the voltage balance of the TP PG is achieved by performing the Park Clark transformation on the voltage in the TP coordinate system, as shown in Eq. (4).

$$\left\{ \begin{gathered} \left[ \begin{gathered} {e_\alpha } \hfill \\ {e_\beta } \hfill \\ \end{gathered} \right]={C_{32}}\left[ \begin{gathered} {e_a} \hfill \\ {e_b} \hfill \\ {e_c} \hfill \\ \end{gathered} \right]={e_0}\left[ \begin{gathered} \cos \omega t \hfill \\ \sin \omega t \hfill \\ \end{gathered} \right] \hfill \\ \left[ \begin{gathered} {e_d} \hfill \\ {e_q} \hfill \\ \end{gathered} \right]={C_{park}}\left[ \begin{gathered} {e_\alpha } \hfill \\ {e_\beta } \hfill \\ \end{gathered} \right]={e_0}\left[ \begin{gathered} \cos (\omega t - \theta ) \hfill \\ \sin (\omega t - \theta ) \hfill \\ \end{gathered} \right] \hfill \\ \end{gathered} \right.$$

In Eq. (4), \({e_a}\), \({e_b}\), and \({e_c}\) represent TP unbalanced voltage. \({e_\alpha }\)\({e_\beta }\) represents α-β Voltage in the coordinate system. When the d-axis coincides with the voltage vector (VV), there are \(\omega t=\theta\), \({e_d}={e_0}\), \({e_q}={e_0}\). By adjusting \({e_q}\) to 0 through a PI regulator, the accurate phase of the grid voltage can be obtained. The coordinate transformation stage can be regarded as a PLL phase detector module, which outputs the \({e_q}\) signal. The voltage controlled oscillator is implemented by an integral stage, which outputs the phase signal and serves as the feedback signal of the phase detector to form a closed-loop. The PI regulator acts as a loop filter stage. Based on the above analysis, it can be concluded that accurate calculation of voltage phase can be achieved under the premise of voltage balance in TP PGs. However, in practical applications, voltage imbalances in the PG can affect the output results of the PLL due to voltage fluctuations. The study focuses on TP three wire systems, and the representation of TP unbalanced voltage is shown in Eq. (5).

$$\left[ \begin{gathered} {{\text{e}}_{\text{a}}} \hfill \\ {{\text{e}}_{\text{b}}} \hfill \\ {{\text{e}}_{\text{c}}} \hfill \\ \end{gathered} \right]=e_{0}^{+}\left[ \begin{gathered} \cos (\omega t+{\varphi _0}) \hfill \\ \cos (\omega t+{\varphi _0} - 120^\circ ) \hfill \\ \cos (\omega t+{\varphi _0}+120^\circ ) \hfill \\ \end{gathered} \right]+e_{0}^{ - }\left[ \begin{gathered} \cos ( - \omega t+{\varphi _1}) \hfill \\ \cos ( - \omega t+{\varphi _1} - 120^\circ ) \hfill \\ \cos ( - \omega t+{\varphi _1}+120^\circ ) \hfill \\ \end{gathered} \right]$$

In Eq. (5), \(e_{0}^{+}\) and \(e_{0}^{ - }\) represent the amplitude of the positive and negative (PAN) sequence components, and \({\varphi _0}\) and \({\varphi _1}\) represent the initial phase angle of the PAN sequence components. It then performs Clark and Park transformations on the PAN sequence components, where the Clark transformation is shown in Eq. (6).

$$\left[ \begin{gathered} {{\text{e}}_\alpha } \hfill \\ {{\text{e}}_\beta } \hfill \\ \end{gathered} \right]={C_{abc - \alpha \beta }}\left[ \begin{gathered} {e_a} \hfill \\ {e_b} \hfill \\ {e_c} \hfill \\ \end{gathered} \right]=e_{0}^{+}\left[ \begin{gathered} \cos (\omega t+{\varphi _0}) \hfill \\ \sin (\omega t+{\varphi _0}) \hfill \\ \end{gathered} \right]+e_{0}^{ - }\left[ \begin{gathered} \cos ( - \omega t+{\varphi _1}) \hfill \\ \sin ( - \omega t+{\varphi _1}) \hfill \\ \end{gathered} \right]$$

The Park transformation is shown in Eq. (7).

$$\left[ \begin{gathered} {{\text{e}}_d} \hfill \\ {{\text{e}}_q} \hfill \\ \end{gathered} \right]={C_{park}}\left[ \begin{gathered} {e_\alpha } \hfill \\ {e_\beta } \hfill \\ \end{gathered} \right]=e_{0}^{+}\left[ \begin{gathered} \cos (\omega t+{\varphi _0} - \theta ) \hfill \\ \sin (\omega t+{\varphi _0} - \theta ) \hfill \\ \end{gathered} \right]+e_{0}^{ - }\left[ \begin{gathered} \cos ( - \omega t+{\varphi _1} - \theta ) \hfill \\ \sin ( - \omega t+{\varphi _1} - \theta ) \hfill \\ \end{gathered} \right]$$

In Eq. (7), \(\theta\) represents the phase angle of the positive sequence component output by the PLL, which is calculated as shown in Eq. (8).

$$\theta \approx \omega t+{\varphi _0}$$

This study substituted Eq. (8) into Eq. (7) to obtain Eq. (9).

$$\left[ \begin{gathered} {{\text{e}}_d} \hfill \\ {{\text{e}}_q} \hfill \\ \end{gathered} \right]=e_{0}^{+}\left[ \begin{gathered} 1 \hfill \\ 0 \hfill \\ \end{gathered} \right]+e_{0}^{ - }\left[ \begin{gathered} \cos ( - 2\omega t+{\varphi _1} - {\varphi _0}) \hfill \\ \sin ( - 2\omega t+{\varphi _1} - {\varphi _0}) \hfill \\ \end{gathered} \right]$$

In Eq. (9), \({{\text{e}}_d}\)and \({{\text{e}}_q}\) respectively represent the voltage components of the d and q axes. When the TP is unbalanced, because of the presence of the fundamental negative sequence component, an error signal of doubling the fundamental frequency will be generated. In addition, when there are harmonics and DC bias in the grid voltage, it can also cause voltage fluctuations, thereby affecting the detection accuracy of the PLL (Wellendorf et al. 2023). A PLL design method on the grounds of second order generalized integrator (SOGI) is studied to address this issue. The second-order generalized integrator is a high-precision frequency locking technique used in power electronic control systems. It can track and phase shift specific frequency AC components, and can be used to achieve PAN sequence separation and filtering of voltage signals. Additionally, the second-order generalized integrator can generate a 90° phase shift on the input AC sine signal, resulting in two orthogonal signals. SOGI can achieve a 90° phase shift of the PG voltage signal and has unique filtering characteristics that filter out the second HC in the d and q axes, achieving accurate phase locking. Additionally, it can detect specific harmonics by adjusting the input frequency. The relevant structure of SOGI is showcased in Fig. 3.

Fig. 3
figure 3

A schematic view of the SOGI

In Fig. 3, K represents the damping coefficient, which contains two output signals with a difference of π/2, indicating an orthogonal signal. The transfer function of the two output signals is shown in Eq. (10).

$$\left\{ \begin{gathered} {\text{D(s)}}=\frac{{K{\omega _0}s}}{{{s^2}+K{\omega _0}s+\omega _{0}^{2}}} \hfill \\ {\text{Q(s)}}=\frac{{K\omega _{0}^{2}}}{{{s^2}+K{\omega _0}s+\omega _{0}^{2}}} \hfill \\ \end{gathered} \right.$$

In Eq. (10), \({\text{s}}\) represents the complex frequency. \({\text{D(s)}}\) represents amplitude frequency, \({\text{Q(s)}}\) represents phase frequency. The study sets \({\text{s}}=j\omega\) and calculates the amplitude frequency characteristics of the transfer function as shown in Eq. (11).

$$\left\{ \begin{gathered} \left| {{\text{D(}}j\omega {\text{)}}} \right|=\frac{{K{\omega _0}\omega }}{{\sqrt {({\omega ^2} - \omega _{0}^{2})+{{(K\omega {\omega _0})}^2}} }} \hfill \\ \angle {\text{D(}}j\omega {\text{)}}=\angle \arctan (\frac{{{\omega ^2} - \omega _{0}^{2}}}{{K\omega {\omega _0}}}) \hfill \\ \end{gathered} \right.$$

The calculation of phase frequency characteristics is shown in Eq. (12).

$$\left\{ \begin{gathered} \left| {{\text{Q(}}j\omega {\text{)}}} \right|=\frac{\omega }{{{\omega _0}}}\left| {{\text{Q(}}j\omega {\text{)}}} \right| \hfill \\ \angle {\text{Q(}}j\omega {\text{)=}}\angle {\text{Q(}}j\omega {\text{)-}}\frac{\pi }{2} \hfill \\ \end{gathered} \right.$$

In Eq. (12), when \(\omega ={\omega _0}\), there is \(|D(j\omega )\left| = \right|Q(j\omega )|=1\), which indicates that the output amplitude remains unchanged. The operating frequency of SOGI is set to second harmonic, specifically designed to filter out second harmonic interference caused by the fundamental negative sequence component. The structure of SOGI-PLL is showcased in Fig. 4. In Fig. 4, the operating frequency of SOGI is the second harmonic, which can filter out the second harmonic interference caused by the fundamental negative sequence component. Interference occurs on the d and q axes after coordinate transformation when there are harmonics in the voltage of the PG. This problem can be effectively solved by adjusting the operating frequency of SOGI, achieving tracking and filtering of each frequency.

Fig. 4
figure 4

PLL structure on the grounds of SOGI

Control algorithm on the grounds of SVPWM

In a parallel APF, the harmonic detection stage outputs a compensation current command signal, and the control circuit generates a PWM signal on the grounds of this command signal to control the opening and closing of the switching device. Due to the use of a voltage type PWM inverter as the main circuit of the parallel APF in the study, the control method of the APF is equivalent to the control method of the PWM inverter (Brosch et al. 2022). In response to this issue, this study introduces SVPWM, a novel modulation method used to control the working state of switching devices on the grounds of the output space voltage or current vector of the inverter. The output voltage of the parallel APF is represented by Eq. (13).

$$\left\{ \begin{gathered} {{\text{U}}_{{\text{a0}}}}=\left[ {{S_a} - \frac{1}{3}({S_a}+{S_b}+{S_c})} \right]{U_{dc}} \hfill \\ {{\text{U}}_{{\text{b0}}}}=\left[ {{S_b} - \frac{1}{3}({S_a}+{S_b}+{S_c})} \right]{U_{dc}} \hfill \\ {{\text{U}}_{{\text{c0}}}}=\left[ {{S_c} - \frac{1}{3}({S_a}+{S_b}+{S_c})} \right]{U_{dc}} \hfill \\ \end{gathered} \right.$$

In Eq. (13), \({\text{S}}\) represents the switch and \({{\text{U}}_{{\text{dc}}}}\) represents the DC side voltage. \({{\text{U}}_{{\text{a0}}}}\), \({{\text{U}}_{{\text{b0}}}}\)and \({{\text{U}}_{{\text{c0}}}}\)respectively represent the output voltage components in the coordinate system. The six switching tubes in a parallel APF have eight different combinations of switch states, which correspond to the vector of the AC side voltage. The vector Uk is used to represent the different switch combination states, where the modes of U0(000) and U7(111) are zero, known as the zero vector. The distribution of each spatial vector on the complex plane is shown in Fig. 5. In Fig. 5, in terms of the principle of vector synthesis, the reference VV of any sector on the complex plane can be synthesized using the two non-zero vectors and zero vectors of its sector.

Fig. 5
figure 5

Plot of the spatial vector distribution in the complex plane

In real-time control, the reference VV U* is first projected onto the α-β coordinate system, and the positional relationship between UA and UB in different sectors is further analyzed. The study introduced variables A, B, and C. When \({U_\beta }>0\), the study set A = 1, otherwise A = 0. When \({U_\beta }<\sqrt 3 {U_\alpha }\), this study sets B = 1, otherwise B = 0. When \({U_\beta }< - \sqrt 3 {U_\alpha }\), this study sets C = 1, otherwise C = 0. The definition of N value is shown in Eq. (14).

$${\text{N}}={\text{A}}+2B + 4 C$$

It establishes a correspondence between N value and sector number, as shown in Table 1. By calculation, the N value of region I is 3, region II is 1, region III is 5, region IV is 4, region V is 6, and region VI is 2.

Table 1 The N values correspond to the sector codes

It then calculates the action time of the spatial VV. Taking the VV U* in the first sector as an example, according to the volt second balance, Eq. (15) can be obtained.

$$\left| {{\text{U*}}} \right|=\frac{{{T_1}}}{T}\left| {{U_1}} \right|+\frac{{{T_2}}}{T}\left| {{U_2}} \right|$$

In Eq. (14), \({\text{T}}\) represents the switching period of PWM, and \({{\text{T}}_{\text{1}}}\) and \({{\text{T}}_{\text{2}}}\) respectively represent the duration of the VVs U1 and U2 in the first sector within one switching period. The angle between the VV U* and U1 is denoted as δ, and Eq. (16) can be obtained.

$$\frac{{{T_1} \cdot \left| {{{\text{U}}_1}} \right|}}{{T \cdot \sin (\pi /3 - \delta )}}=\frac{{{T_2} \cdot \left| {{{\text{U}}_2}} \right|}}{{T \cdot \sin (\delta )}}=\frac{{\left| {{\text{U*}}} \right|}}{{\sin 2\pi /3}}$$

This study substitutes into Eq. (15) to obtain Eq. (17).

$$\left\{ \begin{gathered} {T_1}=\sqrt 3 T\sin (\pi /3 - \delta )\frac{{\left| {{\text{U*}}} \right|}}{{{{\text{U}}_{{\text{dc}}}}}} \hfill \\ {T_2}=\sqrt 3 T\sin \delta \frac{{\left| {{\text{U*}}} \right|}}{{{{\text{U}}_{{\text{dc}}}}}} \hfill \\ \end{gathered} \right.$$

This study projects U* onto the α-β coordinate system to obtain Eq. (18).

$$\left\{ \begin{gathered} {T_1}=\frac{T}{{{\text{2}}{{\text{U}}_{{\text{dc}}}}}}(3{U_\alpha } - \sqrt 3 {U_\beta }) \hfill \\ {T_2}=\sqrt 3 \frac{{T{U_\beta }}}{{{{\text{U}}_{{\text{dc}}}}}} \hfill \\ \end{gathered} \right.$$

To ensure good compensation current following performance of the system, it is necessary for controlling the DC side voltage of the inverter within an appropriate range to avoid overcompensation or under compensation problems caused by significant voltage fluctuations. This study mainly adopts closed-loop control method, which utilizes the structure of the main circuit itself for appropriate control to achieve stable DC side voltage. Presently, the PI control method is extensively utilized in the control of DC side voltage. It mainly compares the DC side voltage value Udc with the set target value Udc* and calculates the deviation value, and then inputs this difference into the PI regulator. The adjusted current ∆ip is used as the input signal for the d-axis, while the input signal for the q-axis is fixed at 0. The calculated signal is added to the instruction current through inverse coordinate transformation. Through this method, during the energy exchange between the AC and DC sides, the DC capacitor voltage can be maintained in a stable state. The harmonic detection method on the grounds of DC side voltage control is showcased in Fig. 6.

Fig. 6
figure 6

Harmonic detection method on the grounds of DC side voltage control

Performance analysis of PLL and harmonic detection algorithm for parallel APF

This study first analyzes the output frequency and phase waveform of SOGI-PLL, and verifies its stationarity. Then, by analyzing the detection results of each harmonic current, the effectiveness of the specific HCD method on the grounds of the SHRCS is verified. Finally, a comparative simulation experiment is conducted between full compensation and specific harmonic compensation.

Performance of PLL and analysis of harmonic detection algorithms

Aiming at evaluating the effectiveness of the proposed APF HCD method, PLL design, and current tracking control algorithm, a simulation model is constructed using Matlab/Simulink to verify the proposed method. The simulated power system’s main circuit comprises a TP programmable voltage module and a load module. The load module is a TP uncontrolled rectifier bridge with a resistive-inductive load. To simulate load imbalance, a single-phase load is added. An inductor is connected in series on the AC side of the load for filtering. The active filtering module comprises two parts: the main circuit module and the pulse logic control module. The main circuit module is connected to the PG in parallel through inductors, and the circuit breaker controls the duration of the grid connection. The control module comprises modules for harmonic detection, compensation current tracking control, and DC side voltage control. Two methods are used for harmonic detection: the ip-iq method and specific harmonic detection. The ip-iq method uses PLL technology to isolate the influence of abnormal variables on the detection, resulting in relatively high detection accuracy. The detection of subharmonics is primarily determined by the cutoff frequency of the LPF. A lower cutoff frequency provides better filtering but also introduces significant delay. Therefore, a compromise must be made when selecting the cutoff frequency. The simulation parameters are showcased in Table 2. The parameters in Table 2 are calculated based on the main circuit parameters. The DC side voltage magnitude determines the output capability of the compensation circuit. A higher voltage results in a greater rate of change of the compensation current, which strengthens the tracking ability of the instruction circuit and improves the compensation effect. However, as the voltage level increases, so does the loss, capacitance volume, and voltage resistance requirements for switching devices. This increase in cost is not conducive to system design. Therefore, it is necessary to select a reasonable value for the DC side voltage. The stability of the DC side voltage can significantly impact system performance. To ensure optimal compensation current, it is necessary to avoid significant fluctuations in the DC side voltage, which are related to the capacitance value. If the capacitance value is too small, the voltage of the DC side bus will fluctuate excessively during load changes. A capacitance value that is too large can decrease the dynamic performance of the system and increase costs. When selecting a capacitance value, it is important to consider the impact of voltage fluctuation, tracking performance, and cost simultaneously. Connecting inductors play a crucial role in storing energy and filtering current during operation. This reduces the content of switching ripple current in the compensation current while bearing a certain fundamental voltage. The larger the inductance value, the better the filtering effect on ripple current and higher harmonics. However, the dynamic performance deteriorates, which affects the final compensation effect.

Table 2 Simulation parameters of the system

Aiming at verifying the effectiveness of the proposed SOGI-PLL technology, the study compared and analyzed its performance with SRF-PLL under actual working conditions. The results of simulating the unbalanced voltage condition of the PG using a TP programmable voltage module are showcased in Fig. 7. Figure 7 shows that the B-phase voltage has a standard amplitude of 300 V. Prior to 0.05s, the amplitude of phases A and C decreased by 20% to 240 V. At 0.05s, it further decreased to 210 V, resulting in an increase in imbalance. The TP programmable voltage module can effectively simulate unbalanced working conditions of the PG voltage.

Fig. 7
figure 7

Results of simulated PG voltage imbalance working condition

The comparison results of the output frequency between traditional SRF-PLL and SOGI based PLL, as well as the output phase waveform of SOGI-PLL, are showcased in Fig. 8. Figure 8 (a) showcases that under the condition of TP imbalance, the output frequency of SRF-PLL exhibits significant fluctuations compared to the standard power frequency, with a fluctuation amplitude of ± 1 Hz. Its fluctuation range is 49.3-50.7 Hz. According to Fig. 8 (b), the output frequency curve of the PLL on the grounds of SOGI possesses a high smoothness, and it can operate stably within two power frequency cycles, ensuring the accuracy of the output phase. Among them, its output frequency is 47 Hz. Figure 8 (c) shows that the SOGI PLL can complete phase locking within 0.024 s and provide accurate phase information, effectively avoiding the impact of grid voltage imbalance.

Fig. 8
figure 8

Experimental results under voltage imbalance conditions

According to the harmonic characteristics of the load, it can be seen that when the uncontrolled rectifier bridge is equipped with a resistive load, the harmonics in the PG are mainly concentrated at 6k ± 1 times, and their content shows a decreasing trend with the increase of harmonic frequency. Therefore, this study prioritizes compensating for low order harmonics with high content and significant impact on the PG. Figure 9 displays the detection results of load current and each harmonic current according to the specific HCD model on the grounds of SHRCS established by the research institute. The waveform of the load side current is shown in Fig. 9(a), with a peak current of 10 A. The fluctuation period is 0.02s. Figure 9 (b), 9 (c), and 9 (d) show that, unlike the fundamental detection method, which subtracts the load current from the fundamental component to obtain all HCs, specific HCD on the grounds of SHRCS can directly obtain each HC. Among them, the peak current of the 5th HC is 2 A, and the peak current of the 7th HC is 1 A. In the 11th HC, it not only includes the 11th HC, but also other HCs. According to the principle of HCD, this is mainly related to the cutoff frequency selection of LPFs. When the cutoff frequency is low, the filtering effect is better, but it also brings significant delay.

Fig. 9
figure 9

Detection results of load current and each harmonic current

To verify the performance of the proposed harmonic detection method, a comparison is conducted with other advanced technologies, including continuous Fourier transform, harmonic detection based on wavelet multi-resolution analysis, and adaptive HCD based on neural networks. The results are presented in Table 3. The proposed method has a calculation time of 2.68s and a response time of 0.34s. It also has a required stability time of only 1.19s under dynamic conditions, indicating its superior performance.

Table 3 Simulation parameters of the system

Analysis of simulation results for parallel APF compensation

Under the application of full harmonic detection method, this study uses the obtained HC as the instruction current. It starts the parallel APF compensation device at 0.05 s, and the waveform of the A-phase grid side current, output compensation current, and command current before and after compensation, as well as the fast Fourier transform (FFT) analysis of the grid side current after compensation, are showcased in Fig. 10. Figure 10 (a) showcases that there is a significant difference in the waveform of the A-phase grid side current before and after compensation. After compensation, the AC side current significantly improves and exhibits a sinusoidal shape. As shown in Fig. 10 (b), after 0.05 s, the actual output compensation current closely follows the command current, indicating the good tracking ability of the output compensation current to the command current. Figure 10(c) shows that the total harmonic distortion (THD) value is 26.58% due to the presence of a harmonic source before compensation. However, after compensation, the THD value significantly decreased to 3.06%, meeting the expected compensation effect. The simulation demonstrates that the active filter structure can accurately detect and filter out harmonic currents in the load, resulting in a sinusoidal grid side current.

Fig. 10
figure 10

Simulation experiment results of full harmonic compensation

The study continued to explore compensation methods for specific harmonics, with a simulation duration of 0.1 s and a sudden load change occurring at 0.05 s. When using the sum of 5th, 7th, and 11th HCs as the command current for compensation, the compensated A-phase grid side current and FFT analysis are showcased in Fig. 11. As shown in Fig. 11(a), when the load undergoes a sudden change, the distortion of the current waveform increases, while the current amplitude rises from 10 to 18 A. As shown in Fig. 11 (b), the compensated 5th, 7th, and 11th harmonic content is significantly reduced, and the THD rate decreases to 4.08%. This indicates that the algorithm proposed by the research institute can combine various harmonics and use them as instruction currents to filter out specified harmonics or certain harmonics, and selecting the main frequency harmonics for compensation can also meet the system’s requirements for harmonic content.

Fig. 11
figure 11

Simulation experiment results of specific harmonic compensation


Currently, as the boost of modern industrial technology, there is a large amount of harmonic pollution in the PG. In response to such problems, a parallel APF is studied and corresponding PLL design and harmonic detection methods are proposed. The study demonstrated that under the condition of TP unbalance, the output frequency of the SRF-PLL fluctuated significantly with respect to the standard power frequency, with a fluctuation amplitude of ± 1 Hz. The output frequency curve of the PLL based on SOGI exhibited high smoothness, and it can operate stably within two power frequency cycles. These findings suggested that the proposed method has good stability. Meanwhile, SOGI PLL can achieve phase locking within 0.024 s and provide precise phase information. This indicated that the method has better timeliness and accuracy. In cases of TP voltage distortion, the output frequency of the SOGI PLL fluctuated slightly, with a range of only ± 0.05 Hz. The specific HCD method used in SHRCS can directly obtain each HC, unlike the fundamental detection method which subtracts the load current from the fundamental component to obtain all HCs. This indicated that the HCD method is relatively simple to operate and can effectively identify HCs. The fifth HC had a peak current of 2 A, while the seventh HC had a peak current of 1 A. The 11th HC included not only itself but also other HCs. Additionally, the proposed method had a calculation time of 2.68s, a response time of 0.34s, and a required stability time of only 1.19s under dynamic conditions. This indicated that the method is highly computationally efficient and stable. The research institute’s parallel APF PLL design and harmonic detection algorithm have shown significant application effects. In practical applications, this method can effectively reduce the impact of harmonics on the PG and improve the quality of electrical energy. However, research primarily focuses on selectively compensating for low-order harmonics with high power content in the system. Further analysis is needed to determine the optimal filtering frequency for achieving the best compensation effect when high-order harmonics are present. Additionally, increasing the inductance value can lead to a deterioration in the system’s dynamic performance, resulting in drawbacks in both volume and cost. LCL structures can be used to reduce the impact of switching ripple currents in the future. Currently, APFs are primarily used in low voltage and low current environments. This study explores the combination of APF parallel technology and multi-level technology with specific subharmonic compensation methods for application in medium to high voltage and large capacity environments.

Data availability

No datasets were generated or analysed during the current study.


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Dan Wang wrote the main manuscript text; Linsen Yang validate the research; Lei Ni supervise the research. All authors reviewed the manuscript.

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Wang, D., Yang, L. & Ni, L. Performance and harmonic detection algorithm of phase locked Loop for parallel APF. Energy Inform 7, 25 (2024).

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